1. Field of the Invention
This invention relates to a semiconductor memory device, and more particularly to a Magnetoresistive Random Access Memory (MRAM) using MTJ (Magnetic Tunnel Junction) elements utilizing tunneling magnetoresistive effect as memory cells.
2. Description of the Related Art
MRAMs storing data by the magnetoresistive effect feature nonvolatility, high-speed operation, high integration, and high reliability. Therefore, MRAMs are expected to be used as rewritable memory devices, in place of DRAMs or EEPROMs. They are now being developed at present. MRAMs have been disclosed in, for example, U.S. Pat. No. 5,986,925, entitled “MAGNETORESISTIVE RANDOM ACCESS MEMORY DEVICE PROVIDING SIMULTANEOUS READING OF TWO CELLS AND OPERATING METHOD,” issued Nov. 16, 1999, assigned to Motorola, Inc., U.S. Pat. No. 5,946,227, entitled “MAGNETORESISTIVE RANDOM ACCESS MEMORY WITH SHARED WORD AND DIGIT LINES,” issued Aug. 31, 1999, assigned to Motorola, Inc., a nonvolatile semiconductor memory device and an information recording method disclosed in Jpn. Pat. Appln. KOKAI Publication No. 2002-25245 (P2002-25245A), published in Japan, Jan. 25, 2002, Roy Scheuerlein, et al., “A 10-ns Read and Write Non-Volatile Memory Array Using a Magnetic Tunnel Junction and FET Switch in each Cell,” 2000 ISSCC Digest of Technical Papers, pp. 128-129, February 2000, M. Durlam, et al., “Nonvolatile RAM based Magnetic Tunnel Junction Elements,” 2000 ISSCC Digest of Technical Papers, pp. 130-131, February 2000, Peter K. Naji, et al., “A 256-Kb 3.0-V 1T1MTJ Nonvolatile Magnetoresistive RAM,” 2001 ISSCC Digett of Technical Papers, pp. 122-123, February 2001, or Kouichi Yamada, et al., “A Novel Sensing Scheme for a MRAM with a 5% MR ratio,” 2001 Symposium on VLSI Circuits Digest of Technical Papers, Session C12-1, June 2001.
An MTJ element used as a memory cell in an MRAM has an insulating film sandwiched between two ferromagnetic films and features the Tunneling Magnetoresistive Effect. In the effect, the magnitude of the tunnel current with the spin directions of the individual ferromagnetic films parallel with each other differs from that with the spin directions nonparallel with each other. When the spin directions become parallel with each other, the tunnel current becomes larger, resulting in a decrease in the resistance of the MTJ element. When the spin directions become nonparallel, the tunnel current becomes smaller, resulting in an increase in the resistance of the MTJ element. The MRAM stores “0” data when the resistance of the MTJ element is low and “1” data when the resistance is high.
FIG. 1 is an equivalent circuit diagram of a typical 1Tr-1MTJ magnetic memory cell in an MRAM disclosed in, for example, FIG. 8.2.1(b) in the paper by Roy Scheuerlein, et al.
A memory cell 11 is composed of an MTJ element 12 and a select transistor 13 connected in series with each other. One end of the MTJ element 12 is connected to a bit line BL. One end of the transistor 13 is connected to the ground potential GND. A write word line is indicated by WWL and a read word line is indicated by RWL.
FIG. 2 is a schematic sectional view of the magnetic memory cell shown in FIG. 1.
A semiconductor substrate 14 is divided into a plurality of element regions by element isolating regions 15 composed of STI (Shallow Trench Isolation). A select transistor 13 is formed in one element region. Numeral 16 indicates a gate oxide film of the select transistor 13, numerals 17, 17 indicate diffusion layers serving as the source and drain of the transistor 13, and numeral 18 indicates the gate electrode of the transistor 13. Each M0 indicates a first interconnection layer, each M1 indicates a second interconnection layer, M2 indicates a third interconnection layer, each CD indicates a contact connecting the first interconnection layer M0 and the diffusion layer 17, C1 indicates a contact connecting the second interconnection layer M1 and the first interconnection layer M0, MX indicates an MTJ connect interconnection layer, and CX indicates a contact connecting the MTJ connect interconnection layer MX and the second interconnection layer M1. In FIG. 2, WWL, RWL, BL, and GND represent the uses of the respective interconnection layers. That is, WWL indicates a write word line, RWL indicates a read word line, BL indicates a bit line, and GND indicates the ground electrode. As shown in FIG. 2, the bit line BL and the write word line WWL are arranged in such a manner that they extend so as to cross each other at right angles.
When data is written into the memory cell 11, current is caused to flow through the bit line BL and the write word line WWL to generate a resultant magnetic field in the MTJ element, thereby writing the data. When the data is read from the memory cell 11, the read word line RWL is activated and current is caused to flow from the bit line BL to the ground electrode GND, thereby reading the data by a sense amplifier connected to the bit line BL.
Here, consider a case where the data is read from a conventional magnetic memory cell.
FIG. 3A is a conceptual diagram to help explain a method of causing a constant current to flow through a magnetic memory cell, converting the data from the magnetic memory cell into voltage, and reading the data in voltage.
In FIG. 3A, numeral 21 indicates a constant current source, 22 a voltmeter, 11 a magnetic memory cell, Rmc the resistance of the magnetic memory cell 11, and i a current flowing through the magnetic memory cell 11. The voltage value Vsignal indicated by the voltmeter 22 is Vsignal=Rmc×i, that is, the product of the current i flowing in the magnetic memory cell 11 and the resistance Rmc of the magnetic memory cell 11.
FIG. 3B is a conceptual diagram to help explain a method of applying a constant voltage to the magnetic memory cell, converting the data from the magnetic memory cell into current, and reading the data in current.
In FIG. 3B, numeral 23 indicates a constant voltage source, 24 an ammeter, 11 a magnetic memory cell, Rmc the resistance of the magnetic memory cell 11, and v a voltage applied to the magnetic memory cell 11.
The current value Isignal indicated by the ammeter 24 is Isignal=v/Rmc, that is, the quotient obtained by dividing the voltage v applied to the magnetic memory cell 11 by the resistance Rmc of the magnetic memory cell 11.
As seen from the read voltage or read current equations, the amount of signal read from the magnetic memory cell depends on the absolute value of the resistance Rmc of the magnetic memory cell in the conventional reading method. This causes the following problem: when the resistance of the MTJ element differs from one memory chip to another, the variation has a direct effect on the amount of read signal.
There is another problem: the amount of read signal varies, depending on the parasitic resistance of the path that allows a current to pass through the magnetic memory cell or the path that applies a voltage. That is, since the distance between the sense amplifier and the constant current source or constant voltage source differs, depending on the position of the magnetic memory cell in the memory cell array, the absolute value of the read-out signal differs from one memory cell to another even in, for example, the same column, which becomes a problem.
Therefore, there has been a need to stabilize the amount of read signal from the magnetic memory cells, regardless of variations in the resistances of the magnetic memory cells or the positions of the magnetic memory cells in the memory cell array, enable a large-scale array configuration, while preventing an increase in the data read speed, and reduce the chip area and the chip cost.